The Quad Flat Pack carrier of assessed quality covered by thisdetail specification shall have:
a) Maximum enclosure dimensions (See Figure 1 and Table 1).
b) Working vdtage not to exceed 250 volts (rms).
c) Current not to exceed one ampere per pin or per semiconductorpackage manufacturer’s recommendations.
OBJECT
The object of this Detail Specification is to provide allinformation required, using Sectional Specification EiA-540A000 asa base, for the identification and quality assessment of Quad Flat-pack Carrier with sdder land areas for attaching surface mountdevices. The surface mount device having 1.0 mm (.039 in.), 0.8 mm(.031 in.), 0.65 mm (.0256 in.), 0.5 mrn (.0197 in.) or 0.4 mm(.0157 in.) lead pitches. Termination pins on carrier formatted on2.54 mm X 2.54 mm (.l00 in. X .l00 in.) grid for interfacingdirectly to a printed wiring board or plugging into pin grid arraysockets. The information contained herein or by reference iscomplete and sufficient for inspection purposes. This device isdesigned to be used with EIA-540 documents, EIA-540BAAA,EIA-540BAAB, EIA-540BAAC and EIA- 540BAAD.
- Edition:
- 92
- Published:
- 01/23/1992
- Number of Pages:
- 20
- File Size:
- 0 files
Reviews
There are no reviews yet.