The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity at room temperature for surface-mount semiconductor devices. This test method is applicable for inspection and device characterization. If package warpage or coplanarity is to be characterized at reflow soldering temperatures, then JESD22-B112 should be used.
- Published:
- 09/01/2010
- Number of Pages:
- 14
- File Size:
- 1 file , 54 KB
- Note:
- This product is unavailable in Russia, Ukraine, Belarus
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