This document describes an algorithm for performing the Standard Wafer Level Electromigration Accelerated Test (SWEAT) method with computer controlled instrumentation. The algorithm requires a separate iterative technique (not provided) to calculate the force current for a given target time to failure. This document does not specify what test structure to use with this procedure. However, users of this algorithm report its effectiveness on both straight-lines and via-terminated test structures. Some test-structures design features are provided in JESD87 and in ASTM 1259M – 96.
- Published:
- 08/01/2003
- Number of Pages:
- 32
- File Size:
- 1 file , 270 KB
- Note:
- This product is unavailable in Russia, Ukraine, Belarus
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