JEDEC JESD 82-25.01

This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTUB32866 registered buffer with parity test for DDR2 RDIMM applications.

The purpose is to provide a standard for the SSTUB32866 (see Note) logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

NOTE The designation SSTUB32866 refers to the part designation of a series of commercial logic parts common in the industry. This number is normally preceded by a series of manufacturer specific characters to make up a complete part designation.

Published:

12/30/2022

Number of Pages:

46

File Size:

1 file , 1.3 MB

Note:

This product is unavailable in Russia, Ukraine, Belarus