W/D NO S/S
Jitter tolerance requirements are specified in terms of jittertemplates. which cover a specified sinusodial amplitude/frequencyregion. Jitter templates represent minimum amount of jitter aparticular piece of equipment must accept without producing thespecified degradation of error performance (i.e., the lower limitof maximum tolerable input jitter). The intended relationship of anequipment’s actual tolerance to input jitter and its associatedjitter tolerance template are illustrated in Figure 1.
The sinusoidal jitter amplitudes that an equipment actuallytolerates at a given frequency are defined as all amplitudes up to,but not including, that which causes the designated degradation oferror performance.
The designated degradation of error performance may be expressedin terms of either bit-error-ratio (BER) penalty or onset-of-errorscriteria. The existence of two criteria arises because the inputjitter tolerance of an individual digital equipment is primarilydetermined by the following two factors:
1. The ability of the input clock recovery circuit to accuratelyrecover clock from a jittered data signal, possibly in the presenceof other degradations (Pulse distortion, crosstalk, noise,etc.).
2. The ability of other components to accommodate dynamicallyvarying input data rates (e.g., pulse justification capacity andsynchronizer and desynchronizer buffer size in an asynchronousdigital multiplex).
- Edition:
- 07
- Published:
- 11/01/2007
- Number of Pages:
- 18
- File Size:
- 1 file , 450 KB
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